feb. 2009 rtc rtc circuit diagram c2e1 e2 c1 g2e2 e1 g1 cm g1e1 e2 g2 c2e1 c1 e2 27 24 24 94 16 16 2.5 21.2 7.5 2.5 25 7 17 23 24 114 418 13 48 23 4 12 13.5 80 0.25 2 6.5 mounting holes 3?5nuts 12mm deep tab #110. t=0.5 30 +1 ?.5 label tc measured point cm100du-24f application general purpose inverters & servo controls, etc mitsubishi igbt modules cm100du-24f high power switching use ? i c ................................................................... 100a ? v ces ......................................................... 1200v ? insulated type ? 2-elements in a pack outline drawing & circuit diagram dimensions in mm
feb. 2009 2 v ce = v ces , v ge = 0v v ge = v ges , v ce = 0v v cc = 600v, i c = 100a, v ge = 15v v cc = 600v, i c = 100a v ge = 15v r g = 3.1 ? , inductive load i e = 100a i e = 100a, v ge = 0v igbt part (1/2 module) fwdi part (1/2 module) case to heat sink, thermal compound applied *2 (1/2 module) case temperature measured point is just under the chips i c = 10ma, v ce = 10v i c = 100a, v ge = 15v v ce = 10v v ge = 0v 1200 20 100 200 100 200 500 ?0 ~ +150 ?0 ~ +125 2500 2.5 ~ 3.5 3.5 ~ 4.5 310 mitsubishi igbt modules cm100du-24f high power switching use v v a a a a w c c v rms n ?m n ?m g 1 20 2.4 39 1.7 1.0 100 50 400 300 150 3.2 0.25 0.35 0.18 *3 31 ma a nf nf nf nc ns ns ns ns c v k/w k/w k/w k/w ? 1.8 1.9 1100 4.1 0.07 3.1 6v v 57 ns collector cutoff current gate leakage current input capacitance output capacitance reverse transfer capacitance t otal gate charge t urn-on delay time t urn-on rise time t urn-off delay time t urn-off fall time reverse recovery time reverse recovery charge emitter-collector voltage contact thermal resistance thermal resistance external gate resistance gate-emitter threshold voltage collector-emitter saturation voltage thermal resistance *1 i ces i ges c ies c oes c res q g t d(on) t r t d(off) t f t rr ( note 1 ) q rr ( note 1 ) v ec( note 1 ) r th(j-c) q r th(j-c) r r th(c-f) r th(j-c? q r g symbol parameter v ge(th) v ce(sat) note 1. i e , v ec , t rr , q rr & die/dt represent characteristics of the anti-parallel, emitter-collector free-wheel diode (fwdi). 2. pulse width and repetition rate should be such that the device junction temperature (t j ) does not exceed t jmax rating. 3. junction temperature (t j ) should not increase beyond 150 c. * 1 : case temperature (tc) measured point is indicated in outline drawing. * 2 : typical value is measured by using thermally conductive grease of = 0.9[w/(m ?k)]. * 3 : if you use this value, r th(f-a) should be measured just under the chips. collector-emitter voltage gate-emitter voltage maximum collector dissipation junction temperature storage temperature isolation voltage w eight g-e short c-e short t c = 25 c pulse (note 2) t c = 25 c pulse (note 2) t c = 25 c charged part to base plate, f = 60hz, ac 1 minute main terminals m5 screw mounting m6 screw t ypical value symbol parameter collector current emitter current t orque strength conditions unit ratings v ces v ges i c i cm i e ( note 1 ) i em ( note 1 ) p c ( note 3 ) t j t stg v iso unit t yp. limits min. max. t est conditions maximum ratings (tj = 25 c, unless otherwise specified) electrical characteristics (tj = 25 c, unless otherwise specified) t j = 25 c t j = 125 c
feb. 2009 3 mitsubishi igbt modules cm100du-24f high power switching use performance curves v ge = 20v t j = 25c 15 11 10 9.5 9 8.5 8 200 100 180 160 140 120 80 60 40 20 0 0 0.5 1 1.5 2 2.5 3 3.5 4 3 2.5 2 1.5 0.5 1 0 0 120 160 40 80 200 t j = 25c t j = 125c v ge = 15v 10 0 10 1 10 2 10 3 2 3 5 7 2 3 5 7 2 3 5 7 0.5 1 1.5 2 2.5 3 3.5 t j = 25c 5 4 3 2 1 0 20 68 12 16 10 14 18 i c = 200a i c = 100a i c = 40a t j = 25c 10 ? 10 ? 0 7 ( & |